1. Field of the Invention
The present invention relates to a noise pulse suppressing circuit in a digital system. More particularly, this invention relates to a circuit, which has the function of suppressing noise pulses having either positive or negative polarity, or having both polarities. The maximum pulse width of the noise to be suppressed can be determined by the frequency of a clock signal or by a counter circuit used in the circuit.
2. Description of the Prior Art
When an input signal, which assumes alternatively high and low levels (abbreviated hereinafter as H and L levels) forming a rectangular waveform, includes noise pulses, it is preferable to suppress or eliminate the noise pulses and transfer the input signal to the next stage without noise by introducing a noise suppressing circuit.
When the noise pulse has a width of short duration, a noise suppressing circuit comprising a shift register and other logic elements may be used by utilizing a characteristic of the short pulse width.
However, the noise pulse suppressing circuit conventionally used has the capability of suppressing noise pulses having only one polarity, namely, either positive or negative polarity. Therefore, the conventional circuit cannot be used to suppress noise pulses having both polarities.